Intel opened the first day of its Spring Intel Developer Forum (IDF) in Beijing with a slew of high-profile announcements, all centered around the company's new 45nm technology. Senior VP Pat Gelsinger was up first with revelations about Intel's forthcoming 45nm processor lineup, system on a chip (SoC) plans, and discrete GPU plans.
First Penryn performance numbers
Gelsinger opened with the first Intel-supplied numbers on how well Penryn stacks up to its predecessor on a number of different application domains. According to Intel, a 3.33GHz Penryn processor (12MB L2 cache) on a 1333MHz frontside bus posts the following increases versus the newly released Core 2 Extreme QX6800 processor:
15 percent in imaging-related applications25 percent for 3D rendering40 percent for gaming40 percent for video encoding (SSE4-optimized)
Note that the typical caveats about vendor-supplied benchmark numbers that come lacking important information apply.
Intel also gave some even more vague numbers for a 45nm Xeon's performance on unspecified high-performance computing benchmarks, boasting a 45 performance percent increase on bandwidth-intensive workloads, and a 25 percent increase "for servers using Java." Much of the increase here comes from the 1600MHz frontside bus on the 45nm Xeon.
In related Xeon news, the Core-based Xeon 7300 series will be launched in the third quarter of this year. This series is aimed at multisocket systems—both blades and servers—and will complete the Xeon line's transition to the Core microarchitecture.
Intel's Tolopai will take x86 into the SoC realm
Back in February, word leaked out that Intel was prepping a Pentium M-based system on a chip (SoC) product for the embedded space, due out in the second half of 2007. The codename of this project is Tolopai, and Gelsinger officially took the wraps off of it today.
Tolopai is the first in what Intel describes as "a family of enterprise-class SoC products that integrate several key system components into a single Intel architecture-based processor. Gelsinger didn't reveal exactly which components will make their way onto the processor die, but previous rumors indicate that the obvious candidates will be included, i.e., the northbridge and southbridge.
What's left unclear in the Tolopai revelations is whether the first products will be introduced at the 65nm or 45nm node. The original rumors had Tolopai at 65nm, but given today's announcements and Gelsinger's emphasis on 2008, it appears that if a 65nm part does appear, it will be short-lived. The 2008 Tolopai incarnation will undoubtedly be a 45nm part.
If you want more details on why Intel is pushing x86 down into the embedded space, especially in the wake of their sell-off of the XScale line, then see "Intel's coming embedded play" for a more complete discussion.
Intel's answer to Torrenza: QuickAssist
Gelsigner briefly introduced the QuickAssist initiative as an accompaniment to Tolopai. Much like AMD's Torrenza platform, the idea behind QuickAssist is to enable more widespread use of accelerator chips in servers.
There isn't much technical detail available yet, so at this stage it's difficult to gauge the prospects of Intel's initial stab at a coprocessor ecosystem effort. The main questions that need answering are:
Is QuickAssist based on Intel's forthcoming common systems interconnect (CSI)?What kind of licensing will Intel offer third-party accelerator makers?
The answer to the first question is almost certainly "yes," and the answer to the second is probably "something similar to what AMD offers with coherent HyperTransport (cHT)." But we'll have to wait for precise answers to these questions.
One novel aspect of QuickAssist that appears to separate it from Torrenza is Intel's planned Accelerator Abstraction Layer (AAL) middleware package. This software layer will provide an interface to the different accelerators in the systems, making it easier for applications to manage them.
Gelsinger talked about Nehalem, but he didn't reveal anything that we haven't covered already. He also talked about Larrabee, as we've previously reported. Also discussed were Intel's plans for the next-generation version of vPro, codenamed "Weybridge" and due out in the second half of this year. As we reported previously, Weybridge will bring vPro capabilities to the Centrino line of laptop hardware.
We'll see more revelations about some of the technologies and initiatives outlined above on Day 2 of IDF, as Intel fleshes out some of what was first introduced here.